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8.1.3 Radiation Hardness of CCD Sensors

The backgrounds at the future LC pose significant challenges to the radiation hardness of CCD sensors. The main component of the background comes from e+e- pairs with estimated 10-year fluence of $\approx1.5\times10^{12}$cm-2. Neutron background from ($\gamma $, n) reactions is also present, reaching $\approx5\times10^{9}$ cm-2 for the same period. The electron background is expected to affect mainly the CCDs in the innermost layer, because it is closest to the beam pipe. The neutron irradiation is almost uniformly distributed in the volume of the vertex detector and affects all CCD chips.

Study of commercially available CCDs is required to build a model for the radiation damage effects, which can be used for estimation of the device lifetime in the expected environment. Radiation hardness studies of CCDs can provide valuable information on the preferable device architecture, chip geometry and operating conditions, which ultimately determine the vertex detector design, performance and cost. Much of this study was concentrated on the device application at near-room temperature because of the advantages of this operation. Operation at low temperatures is usually required to suppress the radiation damage effects in CCDs [9]. By avoiding cooling to cryogenic temperatures it is possible to decrease the thermal distortions of the supporting CCD ladders and to simplify their design, which results in better detector geometry and increased measurement precision. Although attractive from designer's point of view, operation at elevated temperatures faces problems from radiation damage effects, which are addressed in this study.

Both surface and bulk damage effects are expected to take place in the CCD sensors because of the type and the energy spectrum of the radiation background. Ionizing radiation creates electron-hole pairs in silicon dioxide, which is used as gate and field dielectric in CCDs. Charge carriers drift in the electric field (externally applied or built-in) to the corresponding electrode. Electrons quickly reach the positive electrode, but some of the holes remain trapped in the oxide and give rise to radiation-induced trapped positive oxide charge, which can be stable for long time. At any Si-SiO2 interface there are a number of interface traps, which result from the strained or dangling silicon bonds at the boundary between the two materials. Ionizing radiation causes the density of these traps to increase, generating radiation-induced interface traps. The formation of radiation-induced trapped oxide charge (or flat band voltage shift) and interface traps is referred under the term surface damage.

Radiation with sufficiently high energy can displace Si atoms from their lattice positions, creating displacement damage. This process affects the properties of the bulk semiconductor and is known as bulk damage. Low energy electrons and X-rays can deliver only small energy to the recoil Si atom and mainly isolated displacements, or point defects, can be created. On the other hand, heavier particles, such as protons and neutrons can knock out silicon atoms which have sufficient energy to displace other atoms in the crystal. The secondary displacements form defect clusters, which have high local defect density and can be tens of nanometers wide. Defect clusters often have complicated behavior and more damaging effect on the properties of semiconductor devices than point defects. The energy threshold for displacement of a Si atom has been estimated to be about 260 keV for electrons and 190 eV for neutrons, therefore in the expected radiation environment bulk defects can be generated by both particles. Cluster damage is also expected, because the threshold for cluster production is known to be $\approx $5 MeV and $\approx $15 keV for electrons and neutrons [10], respectively.

Trapped holes in the oxides change the parameters of MOS structures in a way identical to applying an external voltage to the gates. Small flat band voltage shifts, in the order of few volts, can be accommodated by adjustment of the amplitude of the gate bias and drive voltages. A limitation may arise from the maximum allowed power dissipation in the gate drivers and in the CCD chip, because the dissipated power is proportional to the voltage amplitude squared. If the flat band voltage shifts are higher, the device can stop to function properly because of parasitic charge injection from the input structures, incomplete reset of the output node or distortion of the shape of the potential wells [11]. However, as long as no parasitic effects from the increased pulse amplitudes appear, the shifts are not a limitation for the device operation.

Interface traps are the dominant source of dark current in modern CCDs, because the generation rate at the Si-SiO2 interface is usually higher than that in the epitaxial bulk silicon. Increase of the surface dark current is the main effect expected from radiation-induced interface defects.

Radiation-induced bulk defects cause the dark current in CCDs to increase, which is well known phenomenon [12] [13]. Dark current is an issue only for near-room temperature operation or long integration times, because it can be reduced to negligible values by cooling. Irradiation with heavy particles (e.g. protons, neutrons) often creates large non-uniformities in the dark current spatial distribution in the CCDs [14]. These non-uniformities, also known as ``dark current spikes'' or ``hot pixels'' manifest themselves as pixels with much higher dark current than the average value for the CCD. Their presence has been connected with the high electric fields caused by the device architecture and field-enhanced emission, the cluster nature of the radiation damage and crystal strains in the silicon material. Dark current spikes have big consequences for high temperature applications. Additionally, some of them show random fluctuations of the generated current, or Random Telegraph Signals (RTS) [15].

Another important bulk damage effect is the loss of signal charge during transfer, or Charge-Transfer Inefficiency (CTI). Charge losses occur when bulk defects capture electrons and emit them at a later moment, so that the released charge cannot join the original signal packet from which it has been trapped. The basic mechanism can be explained by the different time constants and temperature dependencies of the electron capture and emission processes. In the presence of bulk defects electrons are trapped with a capture time constant of $\tau_{c}$ and consequently released with an emission time constant of $\tau_{e}$. For a defect at energy position Et below the conduction band the Shockley-Read-Hall theory gives

 \begin{displaymath}\tau_{e} = \frac{1}{\sigma_{n}X_{n}v_{th}N_{c}}\mbox{exp}\
\left(\frac{E_{t}}{kT}\right)
\end{displaymath} (8.5)

and

 \begin{displaymath}\tau_{c} = \frac{1}{\sigma_{n}v_{th}n_{s}},
\end{displaymath} (8.6)

where
$\sigma_{n}$ = electron capture cross section,
Xn = entropy change factor by electron emission,
vth = thermal velocity for electrons,
Nc = density of states in the conduction band,
k = Boltzmann's constant,
T = absolute temperature,
ns = density of signal charge.

The capture time constant is typically of the order of several hundred nanoseconds and has weak temperature dependence, whereas the emission time constant changes many orders of magnitude because of the exponential temperature behavior. At low temperature the defects can be considered almost permanently occupied with electrons, because the emission time constant of the defects can be very large, of the order of seconds. The defects cannot capture signal electrons and the CTI at low temperature is small. At high temperature the emission time constant becomes small and comparable with the charge shift time. Trapped electrons are able to join their signal packet, because most of them are emitted already during the charge shift time, and charge losses are small. At temperatures between the two extremes these is a peak of the CTI value.


  
Figure 8.19: Schematic representation of the mechanism of charge transfer losses. For simplicity it has been assumed, that only one pixel contains defects.
\epsfxsize=5.0cm \epsfbox{dettrk/vtx/rad/rad_ctidemo.eps}

The mechanism of charge transfer losses is illustrated on Fig. 8.19. When the signal packet encounters traps, some of its electrons are captured and later released. Those electrons, which are released in the trailing pixels do not join their original signal packet and account for the CTI. If a charge packet enters a pixel, in which part of the traps are occupied, less signal electrons can be trapped and therefore less charge can be lost.

We are often interested not only in the CTI value, but in the total losses the charge suffers after all the transfers it takes to reach the output. For a generated charge Cgen, transferred n times, the output charge Cout is given by

 
Cout = Cgen(1 - CTI)n. (8.7)

This dependence shows, that CTI and the number of transfers are the two important parameters that need to be considered for minimizing the charge transfer losses.



 
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Next: 8.1.3.1 Dark Current and Up: 8.1 Vertex Detector Previous: 8.1.2.9 Summary
ACFA Linear Collider Working Group
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