In order to improve the signal-to-noise ratio of the cavity BPM electronics, we planned to install a LPF at the output of the phase detector module. The signal distortion due to the LPF was simulated/modeled for the cases of various cut-off frequencies. The characteristics of the integrated noise fluctuation was also modeled. We estimated S/N dependence on ADC's gate-width and LPF's cut-off frequency. 100 nsec gate-width and 1 MHz LPF seems to be a reasonable configuration. We can expect 30% improvement of S/N. It was also found that S/N was not so sensitive to those parameters around <300 nsec gate-width and 0.5 MHz LPF.